SanDisk CompactFlash 5000 Instrukcja Obsługi Strona 58
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SanDisk Industrial Grade CompactFlash 5000 Product Manual
© 2007 SanDisk® Corporation 51 July 2007
Word 22: ECC Count. This field defines the number of ECC bytes used on
each sector in the Read and Write Long commands.
Words 23-26: Firmware Revision. This field contains the relevant firmware
version for the product.
Words 27-46: Model Number. This field contains the product model
number and is left justified and padded with spaces (20h).
Word 47: Read/Write Multiple Sector Count. This field contains the
maximum number of sectors that can be read or written per interrupt using
the Read Multiple or Write Multiple commands.
Word 48: Double Word Support. This field indicates this product will not
support double word transfers.
Word 49: Capabilities. This field indicates if this product supports DMA Data
transfers and LBA mode. All SanDisk products support LBA mode.
Word 51: PIO Data Transfer Cycle Timing Mode. To determine the proper
device timing category, compare the Cycle Time specified in Table 21 with the
contents of this field in Table 20.
t
0
is the minimum total cycle time, t
2
is the minimum command active time,
and t
2i
is the minimum command recovery time or command inactive time.
The actual cycle time equals the sum of the actual command active time and
the actual command inactive time. The three timing requirements of t
0
, t
2
, and
t
2i
shall be met. The minimum total cycle time requirements are greater than
the sum of t
2
and t
2
i. This means a host implementation may lengthen either
or both t
2
or t
2i
to ensure that t
0
is equal to or greater than the value reported
in the devices IDENTIFY DEVICE data. A device implementation shall support
any legal host implementation.
The IORD-data tri-state parameter specifies the time from the negation edge
of /IORD to the time that the data bus is no longer driven by the device (tri-
state).
Note: For backward compatibility with BIOS written before the definition of
Word 64 for advanced modes, a device reports the highest original PIO
mode it can support in Word 51 (i.e., PIO mode 0, 1 or 2).
Word 52: Single Word DMA Data Transfer Cycle Timing Mode. This field
states that this product does not support any Single Word DMA data transfer
mode.
Word 53: Translation Parameters Valid. Bit 0 of this field is set, indicating
that words 54 to 58 are valid and reflect the current number of cylinders,
heads and sectors. Bit 1 is also set, indicating values in words 64 through 70
are valid.
Words 54-56: Current Number of Cylinders, Heads, Sectors/Track.
These fields contain the current number of user addressable cylinders, heads,
and sectors/track in the current translation mode.
Words 57-58: Current Capacity. This field contains the product of the
current cylinders x heads x sectors.
Word 59: Multiple Sector Setting. This field contains a validity flag in the
odd byte and the current number of sectors that can be transferred per
- SanDisk Industrial Grade 1
- CompactFlash 5000 1
- Table of Contents 2
- List of Tables 5
- Introduction 8
- Features 9
- CompactFlash Standard 10
- PCMCIA Standard 10
- Related Documentation 10
- Functional Description 10
- Technology Independence 11
- Defect and Error Management 11
- Bad Block Management 12
- Automatic Sleep Mode 12
- Power Supply Requirements 12
- Wear Leveling 12
- Product Specifications 14
- System Power Requirements 15
- System Performance 15
- System Reliability 16
- Physical Specifications 16
- Regulatory Compliance 17
- Traceability 17
- Interface Description 18
- Electrical Description 20
- Table 10: Signal Description 21
- Electrical Specification 24
- Output Drive Characteristics 25
- Power Up/Down Timing 26
- Common Memory Read Timing 27
- Table 16 (continued) 28
- Memory Timing Diagrams 29
- I/O Read Timing Diagram 30
- True IDE Mode 32
- Card Configuration 35
- Attribute Memory Function 36
- Attribute Memory function 37
- Attribute Memory) 38
- 202h in Attribute Memory) 39
- Memory) 40
- I/O Transfer Function 41
- Configurations 43
- Memory Mapped Addressing 45
- True IDE Mode Addressing 46
- ATA Registers 46
- Read Only) 47
- Device Control Register 50
- Offset Fh) 50
- ATA Command Description 52
- Check Power Mode–98H, E5H 53
- Erase Sector(s)–C0H 54
- Format Track–50H 55
- Identify Device–ECH 55
- Idle–97H, E3H 63
- Idle Immediate–95H, E1H 63
- Read Buffer–E4H 64
- Read DMA Command–C8H, C9H 64
- Read Multiple–C4H 65
- Read Long Sector–22H, 23H 66
- Read Sector(s)–20H, 21H 66
- Recalibrate–1XH 67
- Request Sense–03H 67
- Seek–7XH 68
- Set Features–EFH 69
- Set Multiple Mode–C6H 70
- Set Sleep Mode–99H, E6H 70
- Standby–96H, E2H 71
- Standby Immediate–94H, E0H 71
- Translate Sector–87H 72
- Wear Level–F5H 72
- Write Buffer–E8H 73
- Write DMA Command–CAH, CBH 73
- Write Long Sector–32H, 33H 73
- Write Multiple Command–C5H 74
- Write Sector(s)–30H, 31H 75
- Write Verify Sector(s)–3CH 76
- Error Posting 77
- CIS Description 78
- I. Warranty Statement 95
- II. General Provisions 95
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